Enhancing Design Rule Checking in IC Layouts Using AI-Based

Design Rule Checking (DRC) is a critical phase at the backend of the IC design flow, it checks the IC against the Design Rules provided by manufacturers to ensure there are no violations. This ensures the reliability and manufacturability of integrated circuits.

However, there are issues associated with Traditional DRC methods. They are rule-based and can be computationally expensive, especially for complex designs with millions of rules. This leads to high complexity and poor performance.

This research project aims to develop an AI-based predictive model, based on historical data, to enhance and streamline the DRC process. By using machine learning algorithms, the objective is to predict potential rule violations before formal DRC runs, thereby reducing the number of rule checks and accelerating the design cycle.

1. Data Collection and Preparation:

• Gather a dataset of IC layouts with corresponding DRC results. Include both positive and negative tests.
• Data pre-processing and data labelling.

2. Model Development:

• Machine Learning model development using processed data.
• Consider CNN? GNN?

3. Evaluation and Optimization:

• Evaluate the effectiveness of the AI-based DRC tool by comparing its performance against traditional DRC methods.
• Optimize the model and tool based on performance metrics.

4. Documentation and Publication:

• Research Paper write-up.

• AI Integration: Leveraging AI to enhance traditional DRC methods introduces a novel approach to a well-established problem in IC design.
• Predictive Capability: By predicting potential violations before formal DRC checks, this approach has the potential to significantly reduce design iteration times and improve efficiency.
• Real-World Application: The integration of the AI model with existing design tools makes the research practically applicable and valuable for industry use.